Reduction of high battery voltage by ratios using a main board for power supply of processing unit based on battery voltage changes over time

A method for managing power of an information handling system, the method comprising:

• coupling a battery to a housing first portion, the battery having a native voltage, the native voltage equal to a full charge voltage of the battery when the battery is fully charged, the native voltage decreasing as the battery discharges to have less than the full charge voltage;
• coupling a secondary board to the housing first portion;
• interfacing the battery and secondary board to provide power to the secondary board at the native voltage;
• coupling a main board to a housing second portion, the main board having a central processing unit and memory, the central processing unit operating at a system voltage, the housing second portion rotationally coupled to the housing first portion by a hinge;
• interfacing the secondary board and the main board by a cable;
• communicating power from the battery through the secondary board at the native voltage and then to the main board through the cable at the battery native voltage;
• and
• reducing the native voltage at the main board from the native voltage by at least a factor of five to the system voltage;
• wherein the main board reduces the native voltage by numerical factors that are based on battery native voltage level changes over time.

A power system comprising:

• a battery storing power at a native voltage, the native voltage having a highest value at a full charge state of the battery, the native voltage decreasing as the battery discharges below the full charge state;
• a secondary board configured to couple to an information handling system housing first portion and having a charger and an embedded controller, the secondary board directly interfaced with the battery to accept power at the native voltage, the charger charging the battery at the native voltage, the embedded controller managing application of power to components of the information handling system;
• and
• a main board configured to couple to the information handling system housing second portion and having a central processing unit and memory, the central processing unit operating at a system voltage, the main board directly interfaced to the secondary board with a cable, the cable communicating power from the secondary board to the main board at the native voltage, the main board dividing the native voltage by at least a factor of five to the system voltage;
• wherein the main board reduces the native voltage by numerical factors that are based on battery native voltage level changes over time.