US 11,907,009 B2 · Phase detection circuit, clock generation circuit and semiconductor apparatus using the phase detection circuit

Abstract

A phase detection circuit may include an edge trigger circuit, a strobe generation circuit and a phase detector. The edge trigger circuit generates a falling clock signal and a rising clock signal based on a reference clock signal and a target clock signal. The strobe generation circuit generates a falling strobe signal and a rising strobe signal having pulse widths varying based on a phase relationship between the reference clock signal and the target clock signal. The phase detector generates a phase detection signal based on the falling clock signal, the rising clock signal, the falling strobe signal and the rising strobe signal.

Claims19

Dependent claims

A phase detection circuit comprising:

an edge trigger circuit configured to generate a falling clock signal by triggering edges of a reference clock signal and to generate a rising clock signal by triggering edges of the reference clock signal and a target clock signal;
a strobe generation circuit configured to generate a falling strobe signal having a pulse width varying based on the falling clock signal and to generate a rising strobe signal having a pulse width varying based on the rising clock signal;
and
a phase detector configured to generate a phase detection signal based on the falling clock signal, the rising clock signal, the falling strobe signal and the rising strobe signal.

1 more element

A phase detection circuit comprising:

an edge trigger circuit configured to generate a falling clock signal having a pulse which enables during a period from a rising edge of a reference clock signal to a rising edge of a target clock signal and to generate a rising clock signal having a pulse which enables during a period from the rising edge of the target clock signal to a subsequent rising edge of the reference clock signal;
a strobe generation circuit configured to generate a falling strobe signal having a pulse width varying based on the falling clock signal and to generate a rising strobe signal having a pulse width varying based on the rising clock signal;
and
a phase detector configured to generate a phase detection signal based on the falling clock signal, the rising clock signal, the falling strobe signal and the rising strobe signal.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

17/975,010Filed 27 Oct 2022 · continuation

Priority

KR 10-2019-007404221 Jun 2019

Published

US 2023/0041331 A19 Feb 2023

Granted

20 Feb 2024

Term ends

Not estimatedThe source records don’t support an estimate.

Classification9 codes

G06F 1/10
Generating or distributing clock signals or signals derived directly therefrom: distribution of clock signals , e.g. skew
G06F 1/06
Generating or distributing clock signals or signals derived directly therefrom: clock generators producing several clock signals
G06F 1/12
Generating or distributing clock signals or signals derived directly therefrom: synchronisation of different clock signals provided by a plurality…
G11C 7/222
Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management: clock generating, synchronizing or…

Family

Application16/705,512Parent of this continuation · filed 6 Dec 2019

US 2023/0041331 A1Pre-grant publication · published 9 Feb 2023

US 11,513,553 B2Parent of this continuation

US 2020/0401180 A1Published application

US 11,907,009 B2This patent

From the US filing history. Foreign family members aren’t listed.

Phase detection circuit, clock generation circuit and semiconductor apparatus using the phase detection circuit

Life of this patent

Phase detection circuit, clock generation circuit and semiconductor apparatus using the phase detection circuit

Life of this patent

Abstract

Claims19