Voltage overshoot dampener in dropout condition
AssigneeTexas Instruments Incorporated
InventorsSaurabh Rai, Venkateswarlu Ramaswamy Tiruvamattur, Ramakrishna Ankamreddi
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AssigneeTexas Instruments Incorporated
InventorsSaurabh Rai, Venkateswarlu Ramaswamy Tiruvamattur, Ramakrishna Ankamreddi
Estimating the term…
Described embodiments include a circuit for dampening overshoot in a voltage regulator. The circuit includes a first and second offset voltage circuits, each having an input coupled to an input voltage terminal. A first comparator has a first comparator input coupled to the first offset output, and a second comparator input coupled to a reference voltage terminal. A second comparator has a third comparator input coupled to an output of the second offset circuit, and a fourth comparator input coupled to a voltage regulator output. An OR gate has first and second logic inputs and a logic output. The first and second logic inputs are coupled to the outputs of the first and second comparators, respectively. A turn-off circuit has a turn-off input coupled to the logic output, and is configured to provide a turn-off signal at a turn-off output to stop current flow from the voltage regulator output.
A circuit for dampening overshoot in a voltage regulator, the circuit comprising:
A voltage regulator circuit, comprising:
A method for dampening overshoot in a voltage regulator, the method comprising:
Dependencies are inferred from the claim text.