NMOS super source follower low dropout regulator

A low dropout voltage regulator comprising:

• a first current source;
• a compensation capacitor coupled to the first current source;
• a buffer transistor having a first gate, a first source, and a first drain, the first gate coupled to the compensation capacitor;
• a second current source coupled to the first source;
• an n-type transistor having a second gate, a second source, and a second drain, the second gate coupled to the second current source and the first source of the buffer transistor, the second source coupled to an output;
• and
• a p-type transistor having a third source coupled to the output.

An electronic device comprising:

• a primary low dropout voltage regulator comprising
• a first current source,
• an n-type transistor having a first gate coupled to the first current source and a first source coupled to an output, and
• a p-type transistor having a second source coupled to the first source of the n-type transistor and a first drain coupled to a second gate of a second n-type transistor;
• and
• a secondary low dropout voltage regulator coupled to the primary low dropout voltage regulator via a resistor coupled to an output of an operational amplifier and a second current source, the resistor and the second current source configured to control an input voltage of the secondary low dropout voltage regulator from the primary low dropout voltage regulator based on an output voltage of the operational amplifier.