Pad structure and testkey structure and testing method for semiconductor device

A testkey structure for a semiconductor device, the testkey structure comprising:

• a substrate;
• at least two pad structures formed on the substrate, each of the pad structure comprising:
• an insulating dielectric layer formed on the substrate;
• a metal interconnection structure formed in the insulating dielectric layer, the metal interconnection structure comprising a first section and a second section, which are insulated from each other;
• and
• a pad that is formed on a top of the insulating dielectric layer so that at least a top surface of the pad is exposed from the insulating dielectric layer, wherein the pad is electrically connected to the first section, and insulated from the second section;
• and
• a test pattern formed in an insulating dielectric layer of the substrate, wherein the first sections of the pad structures are electrically connected to, and the second sections of the pad structures are insulated from, the test pattern.