Display device

A display device including a pixel circuit including a display element configured to be driven by a current and a drive transistor configured to control a drive current of the display element and having a function of performing monitoring processing being a series of processes of measuring a current flowing in the pixel circuit outside the pixel circuit to compensate for deterioration of the drive transistor or the display element, the display device comprising:

• a display portion including a pixel matrix including n rows and m columns, the pixel matrix including n×m number of the pixel circuits, where each of n and m is an integer being larger than or equal to two, a scanning signal line provided corresponding to each of the rows of the pixel matrix, and a data signal line provided corresponding to each of the columns of the pixel matrix;
• a data signal line drive circuit configured to apply a data signal to the data signal line;
• a scanning signal line drive circuit configured to apply a scanning signal to the scanning signal line;
• and
• a first control signal line,
• wherein the scanning signal line drive circuit is configured of a shift register including a plurality of unit circuits each connected to a corresponding scanning signal line,
• each of the plurality of unit circuits includes
• a first output control circuit including a first internal node, a first output terminal connected to another unit circuit, and a first output control transistor including a control terminal connected to the first internal node, a first conduction terminal, and a second conduction terminal connected to the first output terminal,
• a second output control circuit including a second internal node, a second output terminal configured to output an on level signal for at least a part of a monitoring period for which the monitoring processing is performed, and a second output control transistor including a control terminal connected to the second internal node, a first conduction terminal, and a second conduction terminal connected to the second output terminal, and
• a first output circuit control transistor including a control terminal connected to the first control signal line, a first conduction terminal connected to the first internal node, and a second conduction terminal connected to the second internal node,
• a potential to be applied to the first control signal line is switched between a first potential for causing the first output circuit control transistor to be in an on state and a second potential for causing the first output circuit control transistor to be in an off state, and
• the first potential is applied to the first control signal line throughout the monitoring period.