Track-and-hold circuit

A track-and-hold circuit comprising:

• a first transistor comprising a base connected to a positive-phase signal input terminal, a collector connected to a power supply voltage, and an emitter connected to a first positive-phase signal output terminal;
• a second transistor comprising a base connected to a negative-phase signal input terminal, a collector connected to the power supply voltage, and an emitter connected to a first negative-phase signal output terminal;
• a third transistor comprising a base connected to the positive-phase signal input terminal, a collector connected to the power supply voltage, and an emitter connected to a second positive-phase signal output terminal;
• a fourth transistor comprising a base connected to the negative-phase signal input terminal, a collector connected to the power supply voltage, and an emitter connected to a second negative-phase signal output terminal;
• a first capacitor comprising a first end connected to the collector of the first transistor and a second end connected to the emitter of the first transistor;
• a second capacitor comprising a first end connected to the collector of the second transistor and a second end connected to the emitter of the second transistor;
• a third capacitor comprising a first end connected to the collector of the third transistor and a second end connected to the emitter of the third transistor;
• a fourth capacitor comprising a first end connected to the collector of the fourth transistor and a second end connected to the emitter the fourth transistor;
• a constant current source configured to sink a constant current from the first transistor, the second transistor, the third transistor, and the fourth transistor;
• and
• a switch circuit connected between the emitters of the first, second, third, and fourth transistors and the constant current source, and the switch circuit being configured to alternately turn a first differential circuit comprising the first and second transistors and a second differential circuit comprising the third and fourth transistors to an ON state in response to differential clock signals, wherein the switch circuit comprises a fifth transistor and a sixth transistor, a collector of the fifth transistor being connected to the emitter of the first transistor, a collector of the sixth transistor being connected to the emitter of the second transistor, and an emitter of the fifth transistor being directly connected to an emitter of the sixth transistor and the constant current source.

A track-and-hold circuit comprising:

• a first transistor comprising a base connected to a signal input terminal, a collector connected to a power supply voltage, and an emitter connected to a first signal output terminal;
• a second transistor comprising a base is connected to the signal input terminal, a collector connected to the power supply voltage, and an emitter connected to a second signal output terminal;
• a constant current source configured to sink a constant current from the first transistor and the second transistor;
• and
• a switch circuit connected between the emitter of the first transistor and the constant current source, the switch circuit being further connected between the emitter of the second transistor and the constant current source, the switch circuit being configured to alternately turn the first transistor and the second transistor to an ON state in response to differential clock signals, wherein the switch circuit comprises a third transistor and a fourth transistor, a collector of the third transistor being connected to the emitter of the first transistor, a collector of the fourth transistor being connected to the emitter of the second transistor, and an emitter of the third transistor being directly connected to an emitter of the fourth transistor and the constant current source.