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AssigneeCanaan Creative (SH) Co., LTD.
InventorsJieyao Liu, Nangeng Zhang, Jingjie Wu, Shenghou Ma
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A clock generation circuit, a latch using same, and a computing device are provided. The clock generation circuit includes an input end, configured to input a pulse signal; a first output end, configured to output a first clock signal; a second output end, configured to output a second clock signal; and an input drive circuit, a latch circuit, an edge shaping circuit, a feedback delay circuit, and an output drive circuit, where the input drive circuit, the latch circuit, the edge shaping circuit, the feedback delay circuit, and the output drive circuit are sequentially connected between the input end and the first output end as well as the second output end in series. A clock pulse can be effectively shaped, the use of a clock buffer can be reduced, and the correctness and accuracy of data transmission and latching can be improved.
A clock generation circuit, comprising:
A latch, comprising:
A computing device, comprising one or more latches each comprising a plurality of levels of latch circuits and a plurality of levels of clock generation circuits, wherein each of the plurality of levels of clock generation circuits each comprises:
Dependencies are inferred from the claim text.