Switched emitter follower circuit

A switched emitter follower circuit, comprising:

• a first transistor including a base connected to a positive-phase signal input terminal, a collector to which a first power voltage is applied, and an emitter connected to a positive-phase signal output terminal;
• a second transistor including a base connected to a negative-phase signal input terminal, a collector to which the first power voltage is applied, and an emitter connected to a negative-phase signal output terminal;
• a first capacitor including a first end connected to the collector of the first transistor and a second end connected to the emitter of the first transistor;
• a second capacitor including a first end connected to the collector of the second transistor and a second end connected to the emitter of the second transistor;
• a first Gilbert-cell type multiplication circuit including a first positive-phase clock output terminal connected to the emitter of the first transistor and a first negative-phase clock output terminal connected to the base of the first transistor, the first Gilbert-cell type multiplication circuit being configured to output a multiplication result of a first differential clock signal and a second differential clock signal, the first differential clock signal and the second differential clock signal being input from an outside to the first positive-phase clock output terminal and the first negative-phase clock output terminal;
• and
• a second Gilbert-cell type multiplication circuit including a second positive-phase clock output terminal connected to the emitter of the second transistor and a second negative-phase clock output terminal connected to the base of the second transistor, the second Gilbert-cell type multiplication circuit being configured to output a multiplication result of the first differential clock signal and the second differential clock signal to the second positive-phase clock output terminal and the second negative-phase clock output terminal.

A switched source/drain follower circuit, comprising:

• a first transistor including a gate connected to a signal input terminal, a first source/drain to which a first power voltage is applied, and a second source/drain connected to a signal output terminal;
• a capacitor including a first end connected to the first source/drain of the first transistor and a second end connected to the second source/drain of the first transistor;
• and
• a Gilbert-cell type multiplication circuit including a positive-phase clock output terminal connected to the second source/drain of the first transistor and a negative-phase clock output terminal connected to the gate of the first transistor, the Gilbert-cell type multiplication circuit being configured to output a multiplication result of a first differential clock signal and a second differential clock signal, the first differential clock signal and the second differential clock signal being input from an outside to the positive-phase clock output terminal and the negative-phase clock output terminal.