Phase adjustment circuit and endoscope system

A phase adjustment circuit configured to generate a sampling signal used for capturing a video signal at a later timing than a timing indicated by a clock signal, the phase adjustment circuit comprising:

• a binary circuit configured to detect an edge of the video signal and output a binary signal having a voltage that changes at a timing of the detected edge;
• a phase-delayed clock signal generation circuit configured to generate a phase-delayed clock signal having a later phase than a phase of the clock signal by a first delay amount;
• a delay time control circuit configured to cause a phase of the binary signal and the phase of the phase-delayed clock signal to match each other by adjusting the first delay amount on the basis of the binary signal and the phase-delayed clock signal;
• and
• a sampling signal generation circuit configured to generate the sampling signal having a later phase than the phase of the clock signal by a second delay amount,
• wherein the second delay amount is in accordance with both a phase shift amount, which is based on the timing indicated by the clock signal, and the first delay amount adjusted by the delay time control circuit.