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US 11,681,313 B2Granted
Voltage generating circuit, inverter, delay circuit, and logic gate circuit
AssigneeChangxin Memory Technologies, Inc.
InventorLei Zhu
Life of this patent
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Abstract
A voltage generating circuit includes a first transistor and a second transistor. Voltage of a substrate of the first transistor varies with a first parameter. The first parameter is any one of a supply voltage, an operating temperature, as well as a manufacturing process of the voltage generating circuit. A gate of the first transistor is connected to a drain of the first transistor. The substrate of the first transistor serves as an output of the voltage generating circuit. A gate of the second transistor is connected to a drain of the second transistor.
Claims16
A voltage generating circuit, comprising a first transistor and a second transistor,
- wherein voltage of a substrate of the first transistor varies with a first parameter, the first parameter being any one of a supply voltage, an operating temperature, or a manufacturing process of the voltage generating circuit,
- wherein voltage of a substrate of the second transistor varies with the first parameter,
- wherein a gate of the first transistor is connected to a drain of the first transistor, the substrate of the first transistor serves as a first output of the voltage generating circuit, a gate of the second transistor is connected to a drain of the second transistor, and the substrate of the second transistor serves as a second output of the voltage generating circuit,
- wherein the first transistor is a P-type transistor, and the second transistor is an N-type transistor,
- wherein a source of the first transistor is connected to a first voltage node, a source of the second transistor is connected to a second voltage node, and the drain of the first transistor is connected to the drain of the second transistor,
- wherein the voltage generating circuit further comprises a first error amplifier, a second error amplifier, and a third transistor,
- wherein the first error amplifier and the second transistor form a first feedback loop, the substrate of the second transistor being connected to a voltage node of the first feedback loop,
- wherein the second error amplifier and the third transistor form a second feedback loop, the substrate of the first transistor being connected to a voltage node of the second feedback loop,
- wherein a negative input of the first error amplifier is connected to the second voltage node, a positive input of the first error amplifier is connected to a first reference voltage, and an output of the first error amplifier is connected to the substrate of the second transistor,
- wherein a negative input of the second error amplifier is connected to a second reference voltage, a positive input of the second error amplifier is connected to a fourth voltage node, an output of the second error amplifier is connected to a gate of the third transistor, a source of the third transistor is connected to the first voltage node, a drain of the third transistor is coupled to the fourth voltage node through a first resistor, and the output of the first error amplifier is coupled to the fourth voltage node through a second resistor.
7 more elements
A voltage generating circuit, comprising a first transistor and a second transistor,
- wherein voltage of a substrate of the first transistor varies with a first parameter, the first parameter being any one of a supply voltage, an operating temperature, or a manufacturing process of the voltage generating circuit,
- wherein voltage of a substrate of the second transistor varies with the first parameter,
- wherein a gate of the first transistor is connected to a drain of the first transistor, the substrate of the first transistor serves as a first output of the voltage generating circuit, a gate of the second transistor is connected to a drain of the second transistor, and the substrate of the second transistor serves as a second output of the voltage generating circuit,
- wherein the first transistor is a P-type transistor, and the second transistor is an N-type transistor,
- wherein a source of the first transistor is connected to a first voltage node, a source of the second transistor is connected to a second voltage node, and the drain of the first transistor is connected to the drain of the second transistor,
- wherein the voltage generating circuit further comprises a first error amplifier, a second error amplifier, and a third transistor,
- wherein the first error amplifier and the first transistor form a first feedback loop, the substrate of the first transistor being connected to a voltage node of the first feedback loop,
- wherein the second error amplifier and the third transistor form a second feedback loop, the substrate of the second transistor being connected to a voltage node of the second feedback loop,
- wherein a negative input of the first error amplifier is connected to the first voltage node, a positive input of the first error amplifier is connected to a first reference voltage, and an output of the first error amplifier is connected to the substrate of the first transistor,
- wherein a negative input of the second error amplifier is connected to a second reference voltage, a positive input of the second error amplifier is connected to a fourth voltage node, an output of the second error amplifier is connected to a gate of the third transistor, a source of the third transistor is connected to the second voltage node, a drain of the third transistor is coupled to the fourth voltage node through a second resistor, and an output of the first error amplifier is coupled to the fourth voltage node through a first resistor.
7 more elements
Dependencies are inferred from the claim text.