Semiconductor memory device and manufacturing method thereof

A semiconductor memory device comprising:

• a stack structure including insulating patterns and gate patterns alternately stacked with each other;
• a first source layer including a conductive layer and a first protective layer in the conductive layer;
• a channel structure penetrating the stack structure, the channel structure being connected to the first source layer;
• and
• a conductive common source line penetrating the stack structure, the conductive common source line being in contact with the first protective layer,
• wherein the conductive common source line has a portion in contact with the conductive layer of the first source layer between a bottom of the conductive common source line and the first protective layer, and
• wherein the portion protrudes under the protective layer.

A semiconductor memory device comprising:

• a first source layer;
• a second source layer on the first source layer;
• a stack structure including insulating patterns and gate patterns over the second source layer;
• a channel structure penetrating the insulating patterns, the gate patterns, and the second source layer,
• wherein the second source layer includes a conductive layer in contact with the channel structure, a protective layer surrounded by the conductive layer, and a buffer pattern in a portion of the conductive layer, and
• wherein the buffer pattern includes oxide of the conductive layer and is cut by the protective layer and the stack structure.