Semiconductor processing apparatus and sealing device

#The present disclosure generally relates to apparatus for fabricating semiconductor device, more specifically to an apparatus having a processing chamber capable of establishing sealing enclosure through a sealing device.

#Modern integrated circuits (IC) are fabricated with high device density, which typically include millions of components such as transistors, capacitors, resistors, and the like. The integration of greater circuit density calls for reduction of critical dimensions of integrated circuit components. Typically, integrated circuits are produced in large batches on a single wafer through semiconductor processes such as photolithography, deposition, exposure, etching, and polishing. Some of the processes may be operated in a chamber that is in a vacuum state and filled with plasma. On top of that, there is a need to maintaining the vacuum state and minimizing of plasma noise in a processing chamber of a semiconductor apparatus.

#So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.

#FIG. 1A illustrates a lateral cross-sectional view of a chamber apparatus in accordance with some embodiments of the instant disclosure.

#FIG. 1B illustrates a planar cross-sectional view taken along a horizontal plane that includes the I-I line as shown in FIG. 1A.

#It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.

#It should be noted that these figures are intended to illustrate the general characteristics of methods, structure and/or materials utilized in certain example embodiments and to supplement the written description provided below. These drawings are not, however, to scale and may not precisely reflect the precise structural or performance characteristics of any given embodiment, and should not be interpreted as defining or limiting the range of values or properties encompassed by example embodiments. For example, the relative thicknesses and positioning of layers, regions and/or structural elements may be reduced or exaggerated for clarity. The use of similar or identical reference numbers in the various drawings is intended to indicate the presence of a similar or identical element or feature.

#The present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the disclosure are shown. This disclosure may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Like reference numerals refer to like elements throughout.