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US 11,487,314 B2Granted
Method for supply voltage regulation and corresponding device
AssigneeSTMicroelectronics (Grenoble 2) SAS
InventorMichael Giovannini
Life of this patent
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Abstract
An embodiment method for modifying the frequency of a clock signal clocking an integrated circuit supplied by a voltage controller comprises, in response to a command for the modification, varying the frequency of the clock signal at a rate allowing a supply voltage to be controlled by the controller. The variation comprises at least one series of successive divisions of the frequency of the clock signal into successive intermediate signals of respective intermediate frequencies.
Claims23
An integrated circuit comprising:
- a supply voltage controller configured to control a supply voltage provided to the integrated circuit;
- a clock signal generator configured to generate a first clock signal, and to receive a command to modify a frequency of the first clock signal;
- and
- a frequency divider comprising:
- a first counter-comparator configured to receive the first clock signal and a reset signal, and to generate a gating signal;
- a second counter-comparator configured to receive the first clock signal and the reset signal, and to generate the reset signal;
- and
- a gating device configured to receive the first clock signal and the gating signal, and to generate a gated clock signal for clocking the integrated circuit.
5 more elements
A method comprising:
- controlling, by a supply voltage controller of an integrated circuit, a supply voltage provided to the integrated circuit;
- providing, by a clock signal generator of the integrated circuit, a first clock signal to the integrated circuit;
- receiving, by the clock signal generator, a command to modify a frequency of the first clock signal;
- receiving, by each of first and second counter-comparators of a frequency divider, the first clock signal and a reset signal;
- generating, by the second counter-comparator, the reset signal;
- generating, by the first counter-comparator, a gating signal;
- and
- generating, by a gating device of the frequency divider, a gated clock signal for clocking the integrated circuit, based on the first clock signal and the gating signal.
5 more elements
Dependencies are inferred from the claim text.