Dual deck three-dimensional NAND memory with channel dips and method for forming the same

Abstract

A method for forming a three-dimensional (3D) memory device is disclosed. In some embodiments, the method includes forming an alternating dielectric stack on a substrate, and forming a plurality of channel holes penetrating the alternating dielectric stack vertically to expose at least a portion of the substrate. A first mask can be formed to cover the channel holes in a first area and expose the channel holes in a second area. The method also includes forming a recess in the alternating dielectric stack in the second area, followed by forming a second mask in the recess. The second mask covers the channel holes in the second area and exposes the channel holes in the first area. The memory film at bottom of each channel hole in the first area can therefore be removed, while the memory film in the second area can be protected by the second mask.

Dependencies are inferred from the claim text.