Processor having a plurality of cores and a controller that switches power states based on cores state

A method of an apparatus that includes a processor including a plurality of cores, the method comprising:

• switching a power state between a first power state and a second power state, the first power state being a state where one of the plurality of cores is usable and the other cores are unusable, the second power state being a state where the plurality of cores are unusable;
• and
• switching, based on reception of predetermined data in the second power state, the power state from the second power state to the first power state, and when a first condition is met after switching to the first power state, switching the power state from the first power state to the second power state.

An apparatus comprising:

• a processor including at least a first core and a second core;
• wherein the processor is switchable between a first state, a second state, and a third state, the first state is a state in which the first core is usable and the second core is unusable, the second state is a state in which the first core and the second core are unusable, and the third state is a state in which at least the first core and the second core are usable, and
• wherein, based on reception of a data in the second state, the processor turns into the first state from the second state, and, when a condition is met after turning into the first state, the processor turns into the third state from the first state.