Package structure and manufacturing method thereof

A package structure, comprising:

• a sealant;
• a first chip embedded in the sealant, wherein the first chip has a plurality of first conductive pads exposed through the sealant, and a sidewall and a bottom surface of the first chip are covered by the sealant;
• a first circuit layer module disposed on the sealant and the first chip, wherein the first circuit layer module comprises a first circuit layer and a first dielectric layer, the first dielectric layer has a at least one first conductive via, the first circuit layer is disposed on the first dielectric layer and in contact with the first conductive via, the first circuit layer is electrically connected to the first conductive pads through the first conductive via;
• a second circuit layer module disposed on the first circuit layer module, wherein the second circuit layer module comprises a second circuit layer and a second dielectric layer, the second dielectric layer has at least one second conductive via, the second circuit layer is disposed on the second dielectric layer and in contact with the second conductive via;
• a second chip embedded in the second circuit layer module, the second chip having a plurality of second conductive pads on an upper surface of the second chip, the second chip having a bottom surface facing the first chip and being free from the second conductive pads, the second conductive pads electrically connected to the first circuit layer through the second conductive via on the first circuit layer;
• an adhesive layer directly disposed between the entire bottom surface of the second chip and the first circuit layer of the first circuit layer module, the adhesive layer directly contacting the entire bottom surface of the second chip and the first circuit layer, wherein the adhesive layer and the second chip are disposed between the second dielectric layer and the first circuit layer;
• and
• a protecting layer disposed on the second circuit layer module, wherein the protecting layer has a plurality of openings exposing a portion of the second circuit layer module.

A package structure, comprising:

• a sealant;
• a first chip embedded in the sealant, wherein the first chip has a plurality of first conductive pads exposed through the sealant, and a sidewall and a bottom surface of the first chip are covered by the sealant;
• a circuit layer module disposed on the sealant and the first chip, wherein the circuit layer module comprises a plurality of circuit layers and a plurality of dielectric layers, each of the dielectric layers has a plurality of conductive vias, portions of the two adjacent dielectric layers are in direct contact with each other, each of the circuit layers is disposed between the two adjacent dielectric layers and in contact with the conductive vias, the bottommost circuit layer is electrically connected to the first conductive pads through the conductive vias;
• a second chip embedded in the circuit layer module, the second chip having a plurality of second conductive pads on an upper surface of the second chip, the second chip having a bottom surface facing the first chip and being free from the second conductive pads, the second conductive pads electrically connected to the bottommost circuit layer through the conductive via on the bottommost circuit layer;
• an adhesive layer disposed between the entire bottom surface of the second chip and the circuit layer of the circuit layer module, wherein the adhesive layer directly contacts the entire bottom surface of the second chip and the circuit layer;
• and
• a protecting layer disposed on the circuit layer module, wherein the protecting layer has a plurality of openings exposing a portion of the circuit layer module.