Quality-based dynamic scheduling LDPC decoder
AssigneeSK hynix Inc.
InventorsMeysam Asadi, Fan Zhang, Aman Bhatia
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AssigneeSK hynix Inc.
InventorsMeysam Asadi, Fan Zhang, Aman Bhatia
Estimating the term…
Techniques related to improving power consumption of an LDPC decoder are described. In an example, the LDPC decoder uses a message passing algorithm between variable nodes and check nodes. A check node processing unit that generates check node to variable node messages implements a plurality of check node processing mode. Operation in each mode consumes a certain amount of power while providing a certain accuracy. Depending on a reliability of a variable node to check node message received by the check node processing unit, an appropriate check node processing mode is selected and used to generate a corresponding check node to variable node message. The reliability can be estimated for a set of variable node to check node messages based on, for instance, syndrome-related parameters.
A method for decoding a low-density parity-check code (LDPC) codeword, the method implemented on a computing device and comprising:
A device comprising:
An error correction (ECC) system comprising:
Dependencies are inferred from the claim text.