US 11,444,535 B2 · DC-DC converter with improved line transient rejection

Abstract

An emulated peak current mode control (EPCMC) synchronous buck converter device is provided, and may include a converter having an inductor, a high-side switch, and a low-side switch, and an EPCM controller. The controller may include a PWM latch to alternately turn on and off the high-side and low-side switches, a current sense element to output a current sense voltage based on the inductor current, and a feedforward circuit to generate a feedforward voltage. The current sense element outputs a first current sense voltage while the low-side switch is turned on, and outputs a second current sense voltage while the low-side switch is turned off. The feedforward voltage is generated based on a voltage differential that represents a difference between the first current sense voltage and the second current sense voltage, and the PWM latch alternately turns on and off the high-side and low-side switches based on the feedforward voltage.

Claims21

Dependent claims

An emulated peak current mode control (EPCMC) synchronous buck converter device comprising:

a converter configured to receive an input voltage and generate an output voltage, said converter comprising an inductor, a high-side switch, and a low-side switch, wherein said high-side switch and said low-side switch are coupled to, and are configured to control an inductor current through said inductor;
and
an emulated peak current mode (EPCM) controller comprising:
a pulse width modulation (PWM) latch configured to alternately turn on and off said high-side and low-side switches, respectively;
a current sense element configured to output a current sense voltage based on the inductor current through the inductor;
and
a feedforward circuit configured to generate a feedforward voltage;
wherein the current sense element is configured to output a first current sense voltage at a first time while the low-side switch is turned on, and output a second current sense voltage at a second time while the low-side switch is turned on, the second time being delayed from the first time;
wherein said feedforward circuit is configured to generate said feedforward voltage based on a voltage differential that represents a difference between said first current sense voltage and said second current sense voltage;
and
wherein said PWM latch is configured to alternately turn on and off said high-side and low-side switches, respectively, based on said feedforward voltage.

8 more elements

An emulated peak current mode (EPCM) controller for controlling a synchronous buck converter configured to receive an input voltage and generate an output voltage, and having an inductor, a high-side switch, and a low-side switch, said EPCM controller comprising:

a pulse width modulation (PWM) latch configured to alternately turn on and off said high-side and low-side switches, respectively;
a current sense element configured to output a current sense voltage based on an inductor current through the inductor;
and
a feedforward circuit configured to generate a feedforward voltage;
wherein the current sense element is configured to output a first current sense voltage at a first time while the low-side switch is turned on, and output a second current sense voltage at a second time while the low-side switch is turned on, the second time being delayed from the first time;
wherein said feedforward circuit is configured to generate said feedforward voltage based on a voltage differential that represents a difference between said first current sense voltage and said second current sense voltage;
and
wherein said PWM latch is configured to alternately turn on and off said high-side and low-side switches based on said feedforward voltage.

5 more elements

Dependencies are inferred from the claim text.

DC-DC converter with improved line transient rejection

Life of this patent

DC-DC converter with improved line transient rejection

Life of this patent

Abstract

Claims21