Contact stacks to reduce hydrogen in thin film transistor

A method for forming a thin film transistor (TFT), the method comprising:

• forming a channel layer above a substrate;
• forming a conductive contact stack above the substrate and in contact with the channel layer, wherein the conductive contact stack is a drain electrode or a source electrode, and the conductive contact stack includes at least a metal layer, and at least a metal sealant layer to reduce hydrogen diffused into the channel layer through the conductive contact stack, the metal selant layer over the metal layer;
• and
• forming a gate electrode separated from the channel layer by a gate dielectric layer.

A semiconductor device, comprising:

• a substrate;
• a transistor above the substrate, wherein the transistor includes:
• a channel layer above the substrate;
• a conductive contact stack above the substrate and in contact with the channel layer, wherein the conductive contact stack is a drain electrode or a source electrode, and the conductive contact stack includes at least a metal layer, and at least a metal sealant layer to reduce hydrogen diffused into the channel layer through the conductive contact stack, wherein the conductive contact stack includes multiple metal sealant layers separated by one or more metal layers;
• and
• a gate electrode separated from the channel layer by a gate dielectric layer.

A semiconductor device, comprising:

• a substrate;
• a transistor above the substrate, wherein the transistor includes:
• a channel layer above the substrate;
• a conductive contact stack above the substrate and in contact with the channel layer, wherein the conductive contact stack is a drain electrode or a source electrode, and the conductive contact stack includes at least a metal layer, and at least a metal sealant layer to reduce hydrogen diffused into the channel layer through the conductive contact stack, wherein the conductive contact stack includes at least a first metal layer and a second metal layer, the first metal layer includes TiN and the second metal layer includes W, Ru, or Si;
• or the first metal layer includes Ru and the second metal layer includes W or Si;
• or the first metal layer includes Si and the second metal layer W or TiN;
• and
• a gate electrode separated from the channel layer by a gate dielectric layer.