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US 11,444,201 B2Granted
Leakage current reduction in polysilicon-on-active-edge structures
AssigneeQUALCOMM Incorporated
InventorsYoun Sung Choi, Kwanyong Lim, Youseok Suh, Hyunwoo Park
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Abstract
Certain aspects of the present disclosure generally relate to techniques for reducing leakage current in polysilicon-on-active-edge structures. An example transistor structure includes one or more active devices and at least one dummy device disposed at an edge of the transistor structure, wherein the at least one dummy device has a different gate structure than the one or more active devices.
Claims18
A transistor structure comprising:
- one or more active devices;
- and
- at least one dummy device disposed at an edge of the transistor structure, wherein the at least one dummy device has a different gate structure than the one or more active devices, wherein:
- a first gate structure of the at least one dummy device comprises a positive work function metal layer and a negative work function metal layer;
- and
- a second gate structure of the one or more active devices comprises a negative work function metal layer and lacks a positive work function metal layer.
3 more elements
A method for fabricating a transistor structure, comprising:
- forming one or more active devices;
- and
- forming at least one dummy device disposed at an edge of the transistor structure, wherein the at least one dummy device has a different gate structure than the one or more active devices, wherein:
- a first gate structure of the at least one dummy device comprises a positive work function metal layer and a negative work function metal layer;
- and
- a second gate structure of the one or more active devices comprises a negative work function metal layer and lacks a positive work function metal layer.
3 more elements
Dependencies are inferred from the claim text.