LDMOS with enhanced safe operating area and method of manufacture

A method of manufacturing an integrated circuit comprising:

• implanting a deep P-well in a P-type substrate;
• implanting an n-type drift region in the deep P-well;
• depositing a gate structure on a first portion of the n-type drift region;
• implanting a drain structure in a second portion of the n-type drift region, the gate structure and the drain structure being separated by a drift region length (Lds);
• depositing a resist protective oxide (RPO) over a third portion of the n-type drift region between the gate structure and the drain structure;
• depositing a first dielectric layer over the resist protective oxide and the drain structure;
• etching a field plate contact opening in the first dielectric layer to expose a surface portion of the resist protective oxide;
• etching a drain structure contact opening in the first dielectric layer to expose a surface portion of the drain structure;
• depositing a field plate contact in the field plate contact opening for providing a direct electrical connection to the resist protective oxide;
• depositing a drain structure contact in the drain structure contact opening in direct electrical connection with the drain structure, wherein the drain structure contact and the field plate contact are separated by a residual portion of the first dielectric layer;
• and
• forming a conductive pattern in electrical contact with both the field plate contact and the drain structure contact.

A method of improving high-voltage performance in a LDMOS integrated circuit comprising:

• depositing an insulating field plate over a portion of an n-type drift region arranged between a gate structure and a drain structure;
• forming a first direct electrical contact to the insulating field plate;
• forming a second direct electrical contact to the drain structure, wherein the first direct electrical contact is separated from the second direct electrical contact by a dielectric region;
• forming a conductive jumper between the first direct electrical contact and the second direct electrical contact;
• and
• applying a field plate voltage to the insulating field plate during device operation.