MOSFET in sic with self-aligned lateral MOS channel

A method of manufacturing a MOSFET with lateral channel in SiC, said MOSFET comprising:

• an n+substrate (1),
• an n drift layer (3) in contact with the n+substrate (1),
• the method comprising:
• forming a p type buried grid (4) in contact with the n drift layer (3),
• forming a p-well (6) above the p type buried grid (4),
• forming simultaneously formed n type regions (7) comprising an access region (7a) and a JFET region (7b) that are laterally self-aligned and have an intermediate part of the p-well (6) between the access region (7a) and the JFET region (7b);
• forming an n+source (8) in contact with the p-well (6) and the access region (7a),
• forming a p body (9) for a body diode circuit in contact with the p-well (6) and the p type buried grid (4),
• forming an insulating gate oxide (10) on a portion of the n+source (8), the access region (7a), the intermediate part of the p-well (6), and the JFET region (7b),
• forming a gate contact (11) on the insulating gate oxide (10),
• forming an isolation layer (12) on the gate contact (11),
• forming a source contact (13) for a MOSFET circuit in contact with the n+source (8),
• forming a body diode contact (14) for the body diode circuit in contact with the p body (9), and
• forming a drain contact (15) in contact with the n+substrate (1),
• wherein the simultaneously formed access region (7a) and JFET region (7b), which are laterally self-aligned, have the intermediate part of the p-well (6) between the access region (7a) and the JFET region (7b), and are in contact with the gate oxide (10), define a MOS channel (17),
• wherein the access region (7a) is in contact with the n+source (8),
• wherein the JFET region (7b) is in contact with the n drift layer (3) or with an optional n layer (5) between the n drift layer (3) and the JFET region (7b), and
• wherein the access region (7a) and the JFET region (7b) in the simultaneously formed n type regions (7) are formed by ion implantation into the p-well (6) by using one masking step, wherein one of the following steps is carried out:
• i. forming the p-well (6) by a process involving ion implantation and the simultaneously formed n type regions (7) being implanted to such a depth that a part of the p-well (6) under the access region (7a) remains, or
• ii. forming the p-well (6) by epitaxial growth not involving ion implantation, wherein at least one selected from a p-well implant (6b) and the p type buried grid (4) is disposed between the n drift layer (3) and a region consisting of the p-well (6) as well as the access region (7a).