US 11,444,170 B1 · Semiconductor device with backside self-aligned power rail and methods of forming the same

Abstract

Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a dielectric layer formed over a conductive feature; a semiconductor stack formed over the dielectric layer, wherein the semiconductor stack including semiconductor layers stacked up and separated from each other; a first metal gate structure and a second metal gate structure formed over a channel region of the semiconductor stack, wherein the first metal gate structure and the second metal gate structure wrap each of the semiconductor layers of the semiconductor stack; and a first epitaxial feature disposed between the first metal gate structure and the second metal gate structure over a first source/drain region of the semiconductor stack, wherein the first epitaxial feature extends through the dielectric layer and contacts the conductive feature.

Claims20

Dependent claims

A semiconductor device comprising:

a dielectric layer formed over a conductive feature;
a semiconductor stack formed over the dielectric layer, wherein the semiconductor stack including semiconductor layers stacked up and separated from each other;
a first metal gate structure and a second metal gate structure formed over a channel region of the semiconductor stack, wherein the first metal gate structure and the second metal gate structure wrap each of the semiconductor layers of the semiconductor stack;
and
a first epitaxial feature disposed between the first metal gate structure and the second metal gate structure over a first source/drain region of the semiconductor stack, wherein the first epitaxial feature extends through the dielectric layer and contacts the conductive feature.

2 more elements

A method of forming a semiconductor device, comprising:

forming a semiconductor stack over a substrate, wherein the semiconductor stack includes a sacrificial layer, and first semiconductor layers and second semiconductor layers alternately stacked up over the sacrificial layer, and each of a material of the first semiconductor layers, a material of the second semiconductor layers, and a material of the sacrificial layer provides a different etching selectivity;
forming a first dummy gate structure and a second dummy gate structure over the semiconductor stack;
forming a first source/drain (S/D) trench between the first dummy gate structure and the second dummy gate structure, wherein the first S/D trench extends below the sacrificial layer;
replacing the sacrificial layer with a dielectric layer;
and
epitaxially growing a first epitaxial feature in the first S/D trench, wherein a bottom portion of the first epitaxial feature separates the dielectric layer between the first dummy gate structure and the second dummy gate structure.

3 more elements

A method of forming a semiconductor device, comprising:

forming a sacrificial layer over a substrate;
alternately depositing first semiconductor layers and second semiconductor layers over the sacrificial layer, wherein each of a material of the first semiconductor layers, a material of the second semiconductor layers, and a material of the sacrificial layer provides a different etching selectivity;
patterning the first semiconductor layers, the second semiconductor layers, the sacrificial layer, and a top portion of the substrate to form a semiconductor stack;
forming a first dummy gate structure and a second dummy gate structure over the semiconductor stack;
etching along sidewalls of the first dummy gate structure and the second dummy gate structure to form a first source/drain (S/D) trench between the first dummy gate structure and the second dummy gate structure, and a second S/D trench along a sidewall of the second dummy gate structure away from the first dummy gate structure, wherein bottom surfaces of the first S/D trench and the second S/D trench are above the sacrificial layer;
further etching the first S/D trench such that the bottom surface of the first S/D trench is below a bottom surface of the sacrificial layer, while keeping the second S/D trench unchanged;
replacing the sacrificial layer with a dielectric layer;
and
epitaxially growing a first epitaxial feature in the first S/D trench and a second epitaxial feature in the second S/D trench.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor device with backside self-aligned power rail and methods of forming the same

Life of this patent

Semiconductor device with backside self-aligned power rail and methods of forming the same

Life of this patent

Abstract

Claims20