Backside source/drain replacement for semiconductor devices with metallization on both sides

An integrated circuit structure comprising:

• a first transistor including a first semiconductor region, a first source region adjacent a first side of the first semiconductor region, the first source region including an upper and a lower portion, a first drain region adjacent to a second side of the first semiconductor region, the first drain region including an upper and a lower portion, a first source contact above and at least on the upper portion of the first source region, and a first drain contact above and at least on the upper portion of the first drain region, wherein there is not a contact on the lower portion of one or both of the first source region or the first drain region;
• a second transistor including a second semiconductor region, a second source region adjacent a first side of the second semiconductor region, the second source region including an upper and a lower portion, a second drain region adjacent to a second side of the second semiconductor region, the second drain region including an upper and a lower portion, a second source contact below and at least on the lower portion of the second source region, and a second drain contact below and at least on the lower portion of the second drain region;
• a gate stack at least above and on sidewalls of the first semiconductor region, and also at least above and on sidewalls of the second semiconductor region;
• and
• a vertical isolation structure between the first transistor and the second transistor, the vertical isolation structure including an electrically insulating material, such that the vertical isolation structure is between the first source region and the second source region, and is also between the first drain region and the second drain region;
• wherein the first source region and the first drain region each includes one of an n-type dopant or a p-type dopant, and the second source region and the second drain region each includes the other of an n-type dopant or a p-type dopant.

An integrated circuit, comprising:

• a semiconductor region;
• a gate structure at least above the semiconductor region, the gate structure including a gate electrode and a gate dielectric, the gate dielectric between the gate electrode and the semiconductor region;
• a source region adjacent a first side of the gate structure and in contact with the semiconductor region, the source region including a lower portion and an upper portion, the lower portion of the source region being compositionally distinct from the upper portion of the source region;
• a drain region adjacent a second side of the gate structure and in contact with the semiconductor region, the drain region including a lower portion and an upper portion, the lower portion of the drain region being compositionally distinct from the upper portion of the drain region;
• a backside source contact structure in contact with the lower portion of the source region;
• and
• a backside drain contact structure in contact with the lower portion of the drain region, wherein there is not a contact on the upper portion of one or both of the source region or the drain region.