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US 11,444,105 B2Granted
Array substrate and manufacturing method thereof
AssigneeShenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
InventorSuping Xi
Life of this patent
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Abstract
The present invention provides an array substrate and a manufacturing method thereof, an array substrate includes a sub-pixel including a main-region and a sub-region. A gate line is disposed between the main-region and the sub-region, and two adjacent data lines define a pixel boundary. A transparent common electrode line is respectively disposed corresponding to the main-region and the sub-region. Wherein, a projection range of the pixel electrode on the substrate covers a projection range of part of the transparent common electrode line corresponding to a direction of the data line on the substrate.
Claims6
An array substrate, comprising:
- a plurality of sub-pixels disposed on a substrate in an array, each of the sub-pixels comprising a main-region and a sub-region, wherein each of the sub-pixels comprises a main-region thin film transistor, a sub-region thin film transistor, and a shared thin film transistor;
- a gate line disposed corresponding to each row of the sub-pixels and disposed between the main-region and the sub-region, a data line disposed corresponding to each column of the sub-pixels, and two adjacent data lines defining a pixel boundary;
- a transparent common electrode line disposed on a same layer as the gate line and respectively disposed corresponding to the main-region and the sub-region;
- and
- a pixel electrode comprising a main-region pixel electrode disposed corresponding to the main-region and a sub-region pixel electrode disposed corresponding to the sub-region, wherein both the main-region pixel electrode and the sub-region pixel electrode have a rectangular external contour, and the main-region pixel electrode is connected to a drain of the main-region thin film transistor through a through-hole, and the sub-region pixel electrode is connected to a drain of the sub-region thin film transistor through another through-hole;
- wherein a projection range of the pixel electrode on the substrate at least covers a projection range of a part of the transparent common electrode line corresponding to the data line on the substrate and covers a projection range of the through-holes on the substrate;
- and
- wherein the main-region comprises a main-region storage electrode, the main-region storage electrode and a part of the transparent common electrode line corresponding to the main-region are insulated by a dielectric layer and form a main-region storage capacitor;
- and
- the sub-region comprises a sub-region storage electrode, and the sub-region storage electrode and a part of the transparent common electrode line corresponding to the sub-region are insulated by the dielectric layer and form a sub-region storage capacitor.
7 more elements
An array substrate, comprising:
- a plurality of sub-pixels disposed on a substrate in an array, each of the sub-pixels comprising a main-region and a sub-region, wherein each of the sub-pixels comprises a main-region thin film transistor, a sub-region thin film transistor, and a shared thin film transistor;
- a gate line disposed corresponding to each row of the sub-pixels and disposed between the main-region and the sub-region, a data line disposed corresponding to each column of the sub-pixels, and two adjacent data lines defining a pixel boundary;
- a transparent common electrode line disposed on a same layer as the gate line and respectively disposed corresponding to the main-region and the sub-region;
- and
- a pixel electrode comprising a main-region pixel electrode disposed corresponding to the main-region and a sub-region pixel electrode disposed corresponding to the sub-region, wherein both the main-region pixel electrode and the sub-region pixel electrode have a rectangular external contour, and the main-region pixel electrode is connected to a drain of the main-region thin film transistor through a through-hole, and the sub-region pixel electrode is connected to a drain of the sub-region thin film transistor through another through-hole, and the pixel electrode is a transparent electrode;
- wherein a projection range of the pixel electrode on the substrate at least covers a projection range of a part of the transparent common electrode line corresponding to the data line on the substrate and covers a projection range of the through-holes on the substrate;
- wherein the main-region comprises a main-region storage electrode, the main-region storage electrode and a part of the transparent common electrode line corresponding to the main-region storage electrode are insulated by a dielectric layer and form a main-region storage capacitor;
- and
- the sub-region comprises a sub-region storage electrode, and the sub-region storage electrode and a part of the transparent common electrode line corresponding to the sub-region storage electrode are insulated by the dielectric layer and form a sub-region storage capacitor.
6 more elements
Dependencies are inferred from the claim text.