Memory arrays and methods of forming memory arrays

A memory array comprising strings of memory cells, comprising:

• laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, a horizontal pattern of operative memory-cell pillars extending through the insulative tiers and the conductive tiers in individual of the memory blocks, the operative memory-cell pillars having intrinsic compressive mechanical stress;
• at least one dummy structure in the individual memory blocks extending through at least upper of the insulative tiers and the conductive tiers;
• the at least one dummy structure being at least one of (a) and (b), where (a):
• at a lateral edge of the horizontal pattern, and (b):
• at a longitudinal end of the horizontal pattern;
• the at least one dummy structure having intrinsic tensile mechanical stress;
• and
• the at least one dummy structure comprising the (a).

A memory array comprising strings of memory cells, comprising:

• laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, a horizontal pattern of operative memory-cell pillars extending through the insulative tiers and the conductive tiers in individual of the memory blocks, the operative memory-cell pillars having intrinsic compressive mechanical stress;
• at least one dummy structure in the individual memory blocks extending through at least upper of the insulative tiers and the conductive tiers;
• the at least one dummy structure being at least one of (a) and (b), where (a):
• at a lateral edge of the horizontal pattern, and (b):
• at a longitudinal end of the horizontal pattern;
• the at least one dummy structure having intrinsic tensile mechanical stress;
• the at least one dummy structure is a dummy pillar;
• the individual memory blocks comprise multiple of the dummy pillars in the at least one of the (a) and the (b);
• and
• the dummy pillars horizontally completely encircle the horizontal pattern.

A memory array comprising strings of memory cells, comprising:

• laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, a horizontal pattern of operative memory-cell pillars extending through the insulative tiers and the conductive tiers in individual of the memory blocks, the operative memory-cell pillars having intrinsic compressive mechanical stress;
• at least one dummy structure in the individual memory blocks extending through at least upper of the insulative tiers and the conductive tiers;
• the at least one dummy structure being at least one of (a) and (b), where (a):
• at a lateral edge of the horizontal pattern, and (b):
• at a longitudinal end of the horizontal pattern;
• the at least one dummy structure having intrinsic tensile mechanical stress;
• and
• the at least one dummy structure is a horizontally-elongated wall.

A memory array comprising strings of memory cells, comprising:

• laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, a horizontal pattern of operative memory-cell pillars extending through the insulative tiers and the conductive tiers in individual of the memory blocks, the operative memory-cell pillars having intrinsic compressive mechanical stress;
• at least one dummy structure in the individual memory blocks extending through at least upper of the insulative tiers and the conductive tiers;
• the at least one dummy structure being at least one of (a) and (b), where (a):
• at a lateral edge of the horizontal pattern, and (b):
• at a longitudinal end of the horizontal pattern;
• the at least one dummy structure having intrinsic tensile mechanical stress;
• and
• the at least one dummy structure extends through uppermost of the insulative tiers and the conductive tiers and does not extend through a lowest of the insulative tiers and the conductive tiers, a void space being immediately-below the dummy structure.

A memory array comprising strings of memory cells, comprising:

• laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, a horizontal pattern of operative memory-cell pillars extending through the insulative tiers and the conductive tiers in individual of the memory blocks;
• and
• a plurality of insulative dummy pillars in the individual memory blocks, the insulative dummy pillars extending through at least upper of the insulative tiers and the conductive tiers and at least predominately comprising AlOx;
• the insulative dummy pillars being spaced longitudinally along opposing lateral edges of the horizontal pattern longitudinally along the individual memory blocks.

A method of forming a memory array comprising strings of memory cells, comprising:

• forming dummy structures in channel openings and in dummy-structure openings in a stack comprising vertically-alternating first tiers and second tiers;
• removing the dummy structures from the channel openings to leave the dummy structures in the dummy structure openings;
• and
• after the removing, forming operative memory-cell pillars in the channel openings.