Semiconductor apparatus having stacked gates and method of manufacture thereof
AssigneeTokyo Electron Limited
InventorsJeffrey Smith, Anton J. deVilliers, Kandabara N. Tapily, Subhadeep Kal, Gerrit J. Leusink
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AssigneeTokyo Electron Limited
InventorsJeffrey Smith, Anton J. deVilliers, Kandabara N. Tapily, Subhadeep Kal, Gerrit J. Leusink
Estimating the term…
Aspects of the disclosure provide a method for forming a semiconductor apparatus. The method includes forming a first field-effect transistor (FET) that includes a first gate on a substrate of the semiconductor apparatus. The method includes forming a second FET that is stacked on the first FET along a direction substantially perpendicular to the substrate and includes a second gate. The method includes forming a first routing track and a second routing track that is electrically isolated from the first routing track. Each of the first and second routing tracks is provided on a routing plane stacked on the second FET along the direction. A first conductive trace configured to conductively couple the first gate of the first FET to the first routing track can be formed. A second conductive trace configured to conductively couple the second gate of the second FET to the second routing track can be formed.
A method for forming a semiconductor apparatus, the method comprising:
A method for forming a semiconductor apparatus, comprising:
Dependencies are inferred from the claim text.