Semiconductor package including a package substrate including staggered bond fingers

A semiconductor package comprising:

• a package substrate including first and second bond finger arrays, the first and second bond finger arrays arranged along first and second lines, respectively, in a first direction on a surface of the package substrate;
• a first semiconductor chip including a first chip pad array corresponding to the first bond finger array and disposed, on the surface of the package substrate, closer to the second bond finger array than the first bond finger array;
• a second semiconductor chip including a second chip pad array corresponding to the second bond finger array and disposed, on the surface of the package substrate, closer to the first bond finger array than the second bond finger array, and;
• first bonding wires connecting bond fingers of the first bond finger array to chip pads of the first chip pad array;
• second bonding wires connecting bond fingers of the second bond finger array to chip pads of the second chip pad array;
• first trace patterns extending from the bond fingers of the first bond finger array on the substrate, the first trace patterns electrically connecting the bond fingers of the first bond finger array to first wirings of the package substrate;
• and
• second trace patterns extending from the bond fingers of the second bond finger array on the substrate, the second trace patterns electrically connecting the bond fingers of the second bond finger array to second wirings of the package substrate,
• wherein the bond fingers of the first bond finger array and the bond fingers of the second bond finger array are staggered along the first direction,
• wherein each of the bond fingers of the first and second bond finger arrays comprises:
• a finger body portion having a substantially uniform width along a second direction perpendicular to the first direction;
• and
• a finger edge portion having a width that decreases along the second direction.