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US 11,444,048 B2Granted
Shaped interconnect bumps in semiconductor devices
AssigneeTexas Instruments Incorporated
InventorSreenivasan K. Koduri
Life of this patent
Estimating the term…
Abstract
In one instance, a semiconductor package includes a lead frame and a semiconductor die mounted to the lead frame via a plurality of bumps that are shaped or tapered. Each of the plurality of bumps includes a first end connected to the semiconductor die and an opposing, second end connected to the lead frame. The first end has an end surface area A1. The second end has an end surface area A2. The end surface area A1 of the first end is less than the end surface area A2 of the second end. Other aspects are disclosed.
Claims15
A semiconductor package comprising:
- a leadframe;
- a semiconductor die mounted to the leadframe via a plurality of bumps;
- and
- wherein each of the plurality of bumps comprises:
- a first end connected to the semiconductor die, the first end having an end surface area A1, and
- an opposing, second end connected to the leadframe, the second end having a end surface area A2, wherein the end surface area A1 of the first end is less than the end surface area A2 of the second end.
3 more elements
A semiconductor package comprising:
- a leadframe;
- a semiconductor die mounted to the leadframe;
- and
- a plurality of bumps electrically connecting the semiconductor die and the leadframe, the bumps having a longitudinal length extending from a first end to an opposing, second end, wherein the first end is connected to the semiconductor die and the second end is connected to the leadframe, and wherein the first end has a lateral width W1 orthogonal to the longitudinal length that is less than a lateral width W2 of the second end.
1 more element
Dependencies are inferred from the claim text.