Package comprising a substrate with interconnect routing over solder resist layer and an integrated device coupled to the substrate and method for manufacturing the package

An apparatus comprising:

• a substrate comprising:
• (i) at least one inner dielectric layer;
• (ii) a plurality of interconnects located in the at least one inner dielectric layer, wherein the plurality of interconnects includes a pad located on a bottom metal layer of the substrate;
• (iii) an outer dielectric layer located over the at least one inner dielectric layer;
• (iv) means for routing interconnect coupled to the plurality of interconnects,
• wherein the means for routing interconnect is located over the outer dielectric layer,
• wherein the means for routing interconnect is located over the bottom metal layer of the substrate, and
• (v) a cover dielectric layer located over the outer dielectric layer and the means for routing interconnect;
• an integrated device coupled to the substrate;
• and
• a solder interconnect coupled to the pad located on the bottom metal layer of the substrate.

A package comprising:

• a substrate comprising:
• (i) at least one inner dielectric layer;
• (ii) a plurality of interconnects located in the at least one inner dielectric layer, wherein the plurality of interconnects includes a pad located on a bottom metal layer of the substrate;
• (iii) a first outer dielectric layer located over the at least one inner dielectric layer;
• (iv) a cover dielectric layer located over the at least one inner dielectric layer;
• (v) at least one routing interconnect coupled to the plurality of interconnects,
• wherein the at least one routing interconnect is located over the cover dielectric layer,
• wherein the at least one routing interconnect is located over the bottom metal layer of the substrate, and
• (vi) a second outer dielectric layer located over the cover dielectric layer and the at least one routing interconnect;
• an integrated device coupled to the substrate;
• and
• a solder interconnect coupled to the pad located on the bottom metal layer of the substrate.

A method for fabricating package, comprising:

• providing a substrate comprising:
• (i) at least one inner dielectric layer;
• (ii) a plurality of interconnects located in the at least one inner dielectric layer, wherein the plurality of interconnects includes a pad located on a bottom metal layer of the substrate;
• (iii) an outer dielectric layer located over the at least one inner dielectric layer;
• (iv) at least one routing interconnect coupled to the plurality of interconnects,
• wherein the at least one routing interconnect is located over the outer dielectric layer,
• wherein the at least one routing interconnect is located over the bottom metal layer of the substrate, and
• (v) a cover dielectric layer located over the outer dielectric layer and the at least one routing interconnect;
• coupling an integrated device to the substrate;
• and
• coupling a solder interconnect to the pad located on the bottom metal layer of the substrate.