Semiconductor package with leadframe interconnection structure

A method of manufacturing a plurality of semiconductor packages, the method comprising:

• singulating a first semiconductor wafer which includes a plurality of power transistor dies into separate transistor dies;
• singulating a second semiconductor wafer which includes a plurality of power semiconductor driver dies into separate driver dies;
• providing a plurality of leadframes, each leadframe having leads configured to receive a semiconductor die;
• attaching the transistor dies to the leads of the leadframes at a bottom side of the leadframes in a flip-chip configuration;
• attaching a first metal clip to a side of each transistor die facing away from the corresponding leadframe;
• flipping the leadframes so that a top side of the leadframes face upward;
• attaching the driver dies to the leads of the leadframes at the top side of the leadframes in a flip-chip configuration;
• attaching a second metal clip to a side of each driver die facing away from the corresponding leadframe;
• and
• partly encasing the leadframes in a mold compound.

A method of manufacturing a semiconductor package, the method comprising:

• providing a leadframe comprising leads;
• partly encasing the leadframe in a mold compound so that the leads protrude from the mold compound;
• attaching a power transistor die to the leadframe at a first side of the leadframe;
• and
• attaching a driver die to the leadframe at a second side of the leadframe opposite the first side so that the power transistor die and the driver die are disposed in a stacked arrangement, the driver die configured to control the power transistor die,
• wherein the driver die is in direct electrical communication with the power transistor die only through the leadframe and any interconnects which attach the power transistor die and the driver die to the leadframe.