Semiconductor device with galvanically isolated semiconductor chips

A semiconductor device, comprising:

• a chip carrier located at a carrier electrical potential during operation of the semiconductor device;
• a first semiconductor chip arranged on the chip carrier, the first semiconductor chip being located in a first electrical potential domain during operation of the semiconductor device;
• a second semiconductor chip arranged on the chip carrier, the second semiconductor chip being located in a second electrical potential domain different from the first electrical potential domain when the semiconductor device is operated;
• and
• an electrically insulating structure arranged between the first semiconductor chip and the second semiconductor chip, which is configured to galvanically isolate the first semiconductor chip and the second semiconductor chip from each other,
• wherein the first electrical potential domain corresponds to a first operating voltage of the first semiconductor chip,
• wherein the second electrical potential domain corresponds to a second operating voltage of the second semiconductor chip, which is different from the first operating voltage, and
• wherein the carrier electrical potential is different from the first operating voltage and the second operating voltage.