Thermally enhanced semiconductor package with at least one heat extractor and process for making the same

An apparatus comprising:

• a carrier having a top surface;
• a first thinned die comprising a first device layer over the top surface of the carrier and a first dielectric layer over the first device layer;
• a first mold compound residing on the top surface of the carrier, surrounding the first thinned die, and extending beyond a top surface of the first thinned die to define a first opening within the first mold compound and over the first thinned die, wherein:
• the first mold compound does not reside over the first thinned die and provides vertical walls of the first opening, which are aligned with edges of the first thinned die in both X-direction and Y-direction;
• the X-direction and the Y-direction are parallel to the top surface of the carrier, and the X-direction and the Y-direction are orthogonal to each other;
• and
• the top surface of the first thinned die is at a bottom of the first opening;
• and
• a first heat extractor, which is formed of a metal or an alloy, inserted into the first opening, wherein a top surface of the first heat extractor is lower than a top surface of the first mold compound;
• at least a portion of a second heat extractor, which is formed of a metal or alloy, inserted into the first opening and over the first heat extractor, wherein:
• the second heat extractor is attached to the first heat extractor via an attach layer, which is formed of one of a group consisting of thermal conductive epoxies, thermal conductive silicones, or alumina thermal adhesives;
• and
• the first heat extractor, the second heat extractor, and the first thinned die are thermally connected.

An apparatus comprising:

• a carrier having a top surface and a bottom surface opposite the top surface of the carrier, wherein the carrier comprises a plurality of antenna patches at the bottom surface of the carrier;
• a first thinned die comprising a first device layer over the top surface of the carrier and a first dielectric layer over the first device layer, wherein:
• the first dielectric layer and the first device layer have a same plane size;
• the first thinned die and the plurality of antenna patches are located on opposite sides of the carrier;
• and
• the first thinned die is electrically connected to each of the plurality of antenna patches;
• a first mold compound residing on the top surface of the carrier, surrounding the first thinned die, and extending beyond a top surface of the first thinned die to define a first opening within the first mold compound and over the first thinned die, wherein:
• the first mold compound does not reside over the first thinned die, such that the first dielectric layer and the first device layer do not extend horizontally beyond the first opening;
• the first mold compound provides vertical walls of the first opening, which are aligned with edges of the first thinned die in both X-direction and Y-direction;
• the X-direction and the Y-direction are parallel to the top surface of the carrier, and the X-direction and the Y-direction are orthogonal to each other;
• and
• the top surface of the first thinned die is a top surface of the first dielectric layer, and is at a bottom of the first opening;
• at least one portion of a first heat extractor inserted into the first opening and in thermal contact with the first thinned die, wherein:
• the at least one portion of the first heat extractor, which is surrounded by the first mold compound, does not horizontally extend beyond the first thinned die in both the X-direction and the Y-direction;
• and
• the first heat extractor is formed of a metal or an alloy;
• and
• a printed circuit board (PCB) with at least one board contact and a heat sink structure on a bottom surface of the PCB, wherein:
• the bottom surface of the PCB is over the first mold compound and over the first heat extractor;
• and
• the heat sink structure is in thermal contact with the first heat extractor.