Method for making semiconductor device by adopting stress memorization technique

A method of applying a stress memorization technique in making a semiconductor device, comprising a plurality of steps:

• step 1:
• providing a semiconductor substrate, having a front surface and a back surface;
• forming a gate structure on the front surface, wherein the forming the gate structure on the front surface comprises:
• performing thermal oxidation to the semiconductor substrate to simultaneously form a first oxide layer on the front surface and the back surface of the semiconductor substrate;
• simultaneously forming a first polysilicon layer on a surface of the first oxide layer on the front surface and the back surface of the semiconductor substrate;
• performing a photolithography process to define an area of the gate structure, and sequentially etching the first oxide layer and the first polysilicon layer on the front surface of the semiconductor substrate to form the gate structure by superimposing a gate oxide layer and a polysilicon gate, wherein the gate oxide layer includes the first oxide layer after etching, and wherein the polysilicon gate includes the first polysilicon layer after etching;
• step 2:
• forming sidewalls on a side surface of the gate structure, wherein the sidewalls comprises a first silicon nitride sidewall, wherein a process of forming the first silicon nitride sidewall comprises:
• growing a first silicon nitride layer on each of the front surface and the back surface of the semiconductor substrate simultaneously, wherein the first silicon nitride layer on the front surface of the semiconductor substrate is formed to cover a top surface, the side surface of the gate structure and a surface outside the gate structure, and wherein the first silicon nitride layer on the back surface of the semiconductor substrate is formed to cover a surface of the first polysilicon layer;
• performing comprehensive dry etching to the first silicon nitride layer on the front surface of the semiconductor substrate, wherein the first silicon nitride layer on the front surface of the semiconductor substrate is disposed on the side surface of the gate structure and dry-etched into a first silicon nitride sidewall, wherein the first silicon nitride layer on the back surface of the semiconductor substrate is not etched;
• step 3:
• growing a second silicon nitride layer with stress for applying the stress memorization technique on the front surface of the semiconductor substrate;
• step 4:
• performing a etching process to remove the silicon nitride layer after stress transfer is completed, wherein the stress transfer comprises steps of:
• step 41:
• performing a first-time wet etching, wherein the first-time wet etching is a single-wafer wet etching for etching the second silicon nitride layer on the front surface of the semiconductor substrate;
• step 42:
• performing a second-time wet etching, wherein the second-time wet etching is a batch wet etching, wherein the second-time wet etching simultaneously removes the second silicon nitride layer left on the front surface of the semiconductor substrate and reduces a thickness of the first silicon nitride layer on the back surface;
• step 5:
• after step 4, performing subsequent back-end-of-line process of the semiconductor device, wherein the back-end-of-line process comprises a plurality of photolithography processes each follows after a cleaning process, wherein the first silicon nitride layer remaining on the back surface of the semiconductor substrate protects the first polysilicon layer on the back surface of the semiconductor substrate from being damaged in the cleaning process so as to have a uniformly flat back surface.