Methods of forming a package substrate
AssigneeIntel Corporation
InventorsManohar S. Konchady, Tao Wu, Mihir K. Roy, Wei-Lun K. Jen, Yi Li
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AssigneeIntel Corporation
InventorsManohar S. Konchady, Tao Wu, Mihir K. Roy, Wei-Lun K. Jen, Yi Li
Estimating the term…
A coreless package substrate with dual side solder resist layers is disclosed. The coreless package substrate has a top side and a bottom side opposite of the top side and includes a single build-up structure formed of at least one insulating layer, at least one via, and at least one conductive layer. The coreless package substrate also includes a bottom plurality of contact pads on the bottom side, and a top plurality of contact pads on the top side. A bottom solder resist layer is on the bottom side, and a top solder resist layer is on the top side. The concept of dual side solder resist is extended to packages with interconnect bridge with C4 interconnection pitch over a wide range.
A method of forming a package substrate, comprising:
A method of forming a system, comprising:
Dependencies are inferred from the claim text.