Memory device, integrated circuit device and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Sheng Chang, Yao-Jen Yang
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Abstract
A memory device includes at least one bit line, at least one source line, at least one program word line, at least one read word line, and at least one memory cell including a program transistor and a read transistor. The program transistor includes a gate terminal coupled to the at least one program word line, a first terminal coupled to the at least one source line, and a second terminal. The read transistor includes a gate terminal coupled to at least one read word line, a first terminal coupled to the at least one bit line, and a second terminal coupled to the second terminal of the program transistor.
Claims20
A memory device, comprising:
- at least one bit line;
- at least one source line;
- at least one program word line;
- at least one read word line;
- and
- at least one memory cell comprising a program transistor and a read transistor,
- wherein
- the program transistor comprises:
- a gate terminal coupled to the at least one program word line,
- a first terminal coupled to the at least one source line, and
- a second terminal,
- the read transistor comprises:
- a gate terminal coupled to the at least one read word line,
- a first terminal coupled to the at least one bit line, and
- a second terminal coupled to the second terminal of the program transistor, and
- the at least one memory cell is configured to store a datum having any of
- a first value corresponding to a gate dielectric of the program transistor being broken down under a previous application of a predetermined breakdown voltage or higher, or
- a second value corresponding to the gate dielectric not yet broken down.
A method, comprising:
- in a programming operation of a first memory cell having a first program transistor,
- applying a program voltage to a source/drain of the first program transistor, and
- applying a reference voltage to a gate of the first program transistor, wherein
- the program voltage is higher than the reference voltage, and
- a voltage difference between the program voltage and the reference voltage is equal to or higher than a predetermined breakdown voltage to break down a gate dielectric of the first program transistor.
A memory device, comprising:
- at least one bit line;
- at least one source line;
- at least one program word line;
- at least one read word line;
- and
- at least one memory cell comprising a program transistor and a read transistor,
- wherein
- the program transistor comprises:
- a gate terminal coupled to the at least one program word line,
- a first terminal coupled to the at least one source line, and
- a second terminal,
- the read transistor comprises:
- a gate terminal coupled to the at least one read word line,
- a first terminal coupled to the at least one bit line, and
- a second terminal coupled to the second terminal of the program transistor, and
- the memory device further comprises:
- a word line decoder configured to provide a program voltage in response to the at least one memory cell being selected to be programed;
- a switch coupled between the word line decoder and the at least one source line;
- and
- a source line decoder configured to control the switch to turn ON to couple the program voltage from the word line decoder to the at least one source line in response to the at least one memory cell being selected to be programed.
Dependencies are inferred from the claim text.