Methods for erase and reset in a three-dimensional NAND flash memory

Abstract

Methods for erasing storage data of a three-dimensional (3D) memory device are presented. The 3D memory device includes a plurality of memory blocks, each memory block having a plurality of memory strings with vertically stacked memory cells. Each memory cell is addressable through a word line and a bit line. The storage data in a selected memory block can be erased by applying an erase voltage on an array common source and applying a first voltage on the word lines of the selected memory block. Word lines of an unselected memory block are floating, i.e., without external bias, during the erasing operation. After the erasing operation, a second voltage is applied on the word lines of entire memory plane to reset the memory cells for improved data retention.

Dependencies are inferred from the claim text.