Semiconductor memory device and method of operating the semiconductor memory device

A semiconductor memory device comprising:

• a memory cell array including a plurality of memory cells;
• a peripheral circuit configured to perform a program operation on selected memory cells connected to a selected word line among the plurality of memory cells;
• a current sensing circuit configured to generate a pass signal or a fail signal by performing a current sensing operation on the selected memory cells;
• and
• control logic configured to receive the pass signal or the fail signal and control an operation of the peripheral circuit and the current sensing circuit,
• wherein the control logic controls the current sensing circuit and the peripheral circuit to perform the current sensing operation and an operation of applying a program pulse to the selected word line based on a program progress state of the selected memory cells,
• wherein when the program progress state of the selected memory cells corresponds to a first state that includes a first program loop among a plurality of program loops, the control logic controls the current sensing circuit and the peripheral circuit to simultaneously perform the current sensing operation and the operation of applying the program pulse to the selected word line, and wherein when the program progress state of the selected memory cells corresponds to a second state that includes a last program loop among the plurality of program loops, the control logic controls the current sensing circuit and the peripheral circuit to sequentially perform the current sensing operation and the operation of applying the program pulse to the selected word line.