Back to results
US 11,443,802 B2Granted
Adaptive memory management and control circuitry
AssigneeNumem Inc.
InventorsEric Hall, Doug Smith, Nicholas T. Hendrickson, Jack Guedj
Life of this patent
Estimating the term…
Abstract
An adaptive memory management and control circuitry (AMMC) to provide extended test, performance, and power optimizing capabilities for a resistive memory is disclosed herein. In one embodiment, a resistive memory comprises a resistive memory array and an Adaptive Memory Management and Control circuitry (AMMC) that is coupled to the resistive memory array. The AMMC is configured with extended test, reliability, performance and power optimizing capabilities for the resistive memory.
Claims14
Resistive memory comprising:
- a resistive memory array;
- and
- an adaptive Memory Management and Control circuitry (AMMC) coupled to the resistive memory array, wherein the AMMC is configured with extended test, reliability, performance or power optimizing capabilities, wherein the AMMC is configured with the performance optimizing capabilities to optimize memory speed with reduced memory endurance or to optimize memory endurance with reduced memory speed.
A memory subsystem comprising:
- a smart compute memory circuitry;
- a resistive memory array coupled to the smart compute memory circuitry;
- and
- an Adaptive Memory Management and Control circuitry (AMMC) coupled to the resistive memory array, wherein the AMMC is configured with extended test and performance optimizing capabilities, wherein the smart compute memory circuitry comprises an integrated processor with power-management control and memory management control.
1 more element
Dependencies are inferred from the claim text.