Liquid crystal display device and display system

A display panel comprising:

• a first electrode;
• a second electrode provided to face the first electrode;
• and
• a liquid crystal layer provided between the first electrode and the second electrode, wherein a plurality of vertical synchronization signals are provided consecutively in sequence as a dynamic frame rate, and
• the display panel is configured to
• start writing a pixel signal input from outside in accordance with a vertical synchronization signal in the sequence input from outside, in a plurality of display frame periods,
• operate in a first mode in which a potential of the first electrode is higher than a potential of the second electrode, and a second mode in which the potential of the second electrode is higher than the potential of the first electrode, and
• drive the first electrode and the second electrode after the supply of a predetermined vertical synchronization signal in the sequence, in one of the first mode and the second mode that has a shorter total time during a period from a start of a first write of a pixel signal to the display panel to a timing according to the predetermined vertical synchronization signal.

A display panel comprising:

• a first electrode;
• a second electrode provided to face the first electrode;
• and
• a liquid crystal layer provided between the first electrode and the second electrode, wherein a plurality of vertical synchronization signals are provided consecutively in sequence as a dynamic frame rate, and
• the display panel is configured to
• start writing a pixel signal input from outside in accordance with a vertical synchronization signal in the sequence input from outside, in a plurality of display frame periods,
• operate in a first mode in which a potential of the first electrode is higher than a potential of the second electrode, and a second mode in which the potential of the second electrode is higher than the potential of the first electrode, and
• switch modes when a difference between a total time of the first mode and a total time of the second mode is within a predetermined time, during a period from a start of a first write of a pixel signal to the display panel to a timing according to a predetermined vertical synchronization signal in the sequence.