Shift register, gate drive circuit, display panel and driving method

A shift register, comprising:

• a first output module, a second output module, a first node, a second node, a first power supply signal terminal, a first clock signal terminal and a scan output terminal;
• wherein the first output module and the second output module are electrically connected to the scan output terminal;
• wherein the first output module is further electrically connected to the first power supply signal terminal and the first node, the first node is configured to control a conduction state of the first output module, and during the first output module conducting, a voltage signal input by the first power supply signal terminal is output to the scan output terminal;
• wherein the second output module is electrically connected to the first clock signal terminal and the second node, wherein the second node is configured to control a conduction state of the second output module, and during the second output module conducting, a voltage signal input by the first clock signal terminal is output to the scan output terminal;
• and
• wherein there is no capacitor in at least one of the first output module or the second output module;
• wherein the shift register further comprises:
• a first node control module, a second node control module, a node mutual control module, a first shift input terminal, a first level signal terminal, a second clock signal terminal and a second power supply signal terminal;
• wherein the first node control module and the second node control module are electrically connected to the first level signal terminal;
• wherein the first node control module is further electronically connected to the second clock signal terminal, the second power supply signal terminal and the first node;
• and the first node control module is configured to control a potential of the first node according to a voltage signal input by the first level signal terminal, a voltage signal input by the second clock signal terminal and a voltage signal input by the second power supply signal terminal,
• wherein the second node control module is further electronically connected to the first shift input terminal and the second node;
• and the second node control module is configured to control a potential of the second node according to a voltage signal input by the first level signal terminal and a voltage signal input by the first shift input terminal;
• and
• wherein the node mutual control module is electronically connected to the first node, the second node and the first power supply signal terminal;
• and the node mutual control module is configured to control the potential of the second node according to the potential of the first node, or control the potential of the first node according to the potential of the second node.