Driving circuit comprising redundant clock signal line and display panel

A display panel, comprising:

• a driving circuit disposed in a non-display area of the display panel, wherein the driving circuit comprising:
• a signal generator;
• a driving circuit unit;
• a clock signal line group comprising a plurality of clock signal lines, wherein an input end of the clock signal line is electrically connected to the signal generator, and an output end of the clock signal line is electrically connected to the driving circuit unit, the clock signal lines are arranged side by side, and there is a first pitch between two adjacent clock signal lines;
• a non-high frequency signal line, wherein an input end of the non-high frequency signal line is electrically connected to the signal generator, and the non-high frequency signal line is provided on two sides of the clock signal line group;
• and
• a redundant clock signal line, wherein an input end of the redundant clock signal line is electrically connected to the signal generator;
• the redundant clock signal line is disposed between the clock signal line group and the non-high frequency signal line;
• a frequency and an amplitude of a signal received by the redundant clock signal line are the same as a frequency and an amplitude of a signal received by the clock signal line;
• wherein the redundant clock signal line has a second pitch with an adjacent clock signal line, the second pitch is equal to the first pitch, a width of the redundant clock signal line is less than a width of the clock signal line, the non-high frequency signal line has a third pitch with an adjacent redundant clock signal line, and the third pitch is greater than the second pitch.