Acceleration of convolutional neural networks on analog arrays

A method, in a data processing system, for acceleration of convolutional neural networks on analog arrays, the method comprising:

• receiving, via one or more input ports, image signals from one or more frames in an input image;
• storing, in one or more input memory arrays, the image signals received from the one or more input ports into a respective input memory location to create a plurality of image sub-regions in the one or more input memory arrays, the image sub-regions being in an image sub-region order in the one or more input memory arrays;
• associating, via a distributor, each of a set of analog array tiles in an analog array to a part of one or more image sub-regions of the one or more input memory arrays, so that one or more of a set of analog memory components is associated with one or more of the image signals in a distribution order to create a respective output signal, each of the set of analog array tiles associated with a respective analog array tile in the set of analog array tiles in parallel with other analog array tiles of the set of analog array tiles, each analog array tile having a plurality of analog memory components, one or more of the set of analog memory components having weighting factors;
• and
• storing, via an assembler, each of the respective output signals into one of a set of memory outputs in an output order that is determined by the distribution order, the set of memory outputs being part of one or more output memory arrays with each memory output associated with a part of an output image.

A computer program product comprising a computer readable storage medium having a computer readable program for acceleration of convolutional neural networks on analog arrays stored therein, wherein the computer readable program, when executed on a computing device, causes the computing device to:

• receive, via one or more input ports, image signals from one or more frames in an input image;
• store, in one or more input memory arrays, the image signals received from the one or more input ports into a respective input memory location to create a plurality of image sub-regions in the one or more input memory arrays, the image sub-regions being in an image sub-region order in the one or more input memory arrays;
• associate, via a distributor, each of a set of analog array tiles in an analog array to a part of one or more image sub-regions of the one or more input memory arrays, so that one or more of a set of analog memory components is associated with one or more of the image signals in a distribution order to create a respective output signal, each of the set of analog array tiles associated with a respective analog array tile in the set of analog array tiles in parallel with other analog array tiles of the set of analog array tiles, each analog array tile having a plurality of analog memory components, one or more of the set of analog memory components having weighting factors;
• and
• store, via an assembler, each of the respective output signals into one of a set of memory outputs in an output order that is determined by the distribution order, the set of memory outputs being part of one or more output memory arrays with each memory output associated with a part of an output image.