Compensation for reference transistors and memory cells in analog neuro memory in deep learning artificial neural network
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Vipin Tiwari, Nhan Do
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Abstract
Numerous embodiments are disclosed for compensating for differences in the slope of the current-voltage characteristic curve among reference transistors, reference memory cells, and flash memory cells during a read operation in an analog neural memory in a deep learning artificial neural network. The embodiments are able to compensate for slope differences during both sub-threshold and linear operation of reference transistors.
Claims28
A method of adjusting a reference transistor in a flash memory system, comprising:
- receiving an input voltage;
- multiplying the input voltage by a coefficient to generate an output voltage;
- applying the output voltage to a gate of the reference transistor;
- and
- using the reference transistor in a sense operation to determine a value stored in a selected memory cell.
A method of adjusting a characteristic curve of a reference memory cell in a flash memory system, comprising:
- receiving an input voltage;
- multiplying the input voltage by a coefficient to generate an output voltage;
- applying the output voltage to a gate of the reference memory cell;
- and
- using the reference memory cell in a sense operation to determine a value stored in a selected memory cell.
Dependencies are inferred from the claim text.