Locking execution of cores to licensed programmable devices in a data center
AssigneeXilinx, Inc.
InventorsBrian S. Martin, Premduth Vidyanandan, Mark B. Carson, Neil Watson, Gary J. McClintock
Life of this patent
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AssigneeXilinx, Inc.
InventorsBrian S. Martin, Premduth Vidyanandan, Mark B. Carson, Neil Watson, Gary J. McClintock
Estimating the term…
An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a programmable fabric of the programmable device, and an intellectual property (IP) checker circuit in the kernel logic. The IP checker circuit is configured to obtain a device identifier (ID) of the programmable device and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.
A hardware accelerator for a computer system, the hardware accelerator including a programmable device, the hardware accelerator comprising:
A computer system, comprising:
A method of locking kernel logic, the method comprising:
Dependencies are inferred from the claim text.