Cache memory, memory system including the same and operating method thereof

A cache memory comprising:

• a first cache area corresponding to even addresses received from a host;
• and
• a second cache area corresponding to odd addresses received from the host,
• wherein each of the first and second cache areas includes a plurality of cache sets classified by a plurality of indexes which are low-order bits of the even addresses and the odd addresses so that N number of cache sets correspond to each index, where N is an integer greater than or equal to 4, and each cache set comprises:
• a data set field configured to store data corresponding to an address among the even and odd addresses;
• and
• a pair field configured to store location information for the N number of cache sets included in each index where data corresponding to an address which is adjacent to the address corresponding to the stored data, is stored in a corresponding data set field associated with the location information, and
• wherein the stored data and the data corresponding to the adjacent address within each index are evicted together, based on the location information stored in the pair field.