High speed debug hub for debugging designs in an integrated circuit

A debug hub disposed within an integrated circuit, the debug hub comprising:

• a transaction manager configured to receive a debug command from a host system and send debug data to the host system;
• a controller configured to control operation of the transaction manager and exchange of the debug command and the debug data with the host system;
• and
• a debug core interface coupled to the controller and to a plurality of debug cores, wherein the debug core interface includes a transmit engine configured to convert the debug command to a transmit data stream and send the debug command to a target debug core of the plurality of debug cores as the transmit data stream;
• wherein the transmit engine is configured to discard a portion of the debug command based on a length field specified in a header of the debug command;
• and
• wherein the debug core interface is configured to receive the debug data from the target debug core as a receive data stream and convert the debug data to memory mapped data for sending to the host system.

A method, comprising:

• receiving, within a debug hub of an integrated circuit, a debug command from a host system, wherein the debug command is received over a high-speed interface coupled to the host system and the debug hub is coupled to a plurality of debug cores of the integrated circuit through a plurality of channels;
• determining an address from the debug command, wherein the address corresponds to a selected debug core of the plurality of debug cores and a selected transmit channel of the plurality of channels, wherein the selected transmit channel is connected to the selected debug core;
• converting the debug command from memory mapped data to a data stream, wherein a portion of the debug command is discarded based on a length field specified in a header of the debug command;
• and
• sending the debug command to the selected debug core via the selected transmit channel.