Apparatus and method for using an error correction code in a memory system

A memory system, comprising:

• a memory device comprising a plurality of non-volatile memory cells;
• and
• a controller in communication with the memory device and configured to store a codeword in the plurality of non-volatile memory cells or read the codeword from the plurality of non-volatile memory cells, and
• wherein the controller is configured to:
• multiply one or more data bits by a first matrix to generate a first result;
• obtain a first parity group of parity bits by multiplying the first result by a second matrix and a second parity group of parity bits by an exclusive OR operation on the first result and the first parity group of parity bits, based on a plurality of polynomials determined based on the second matrix;
• and
• combine the one or more data bits and the first and second parity groups of parity bits to generate the codeword.

A method for operating a memory system, comprising:

• checking one or more data bits and a program command input from an external device;
• multiplying the one or more data bits by a first matrix to generate a first result;
• dividing parity bits into a first parity group of parity bits obtained by multiplying the first result by a second matrix and a second parity group of parity bits obtained by an exclusive OR operation on the first result and the first parity group of parity bits, based on a plurality of polynomials determined by the second matrix;
• combining the one or more data bits and the first and second parity groups of parity bits to generate a codeword;
• and
• writing the generated codeword into the memory system.