Error rate measuring apparatus and error counting method

An error rate measuring apparatus comprising:

• a transceiver configured to:
• transmit a non return to zero (NRZ) signal of a known pattern as a test signal to a device under test;
• and
• receive, from the device under test, a signal outputted from the device under test compliant with an input of the test signal;
• and
• a processor configured to:
• set one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test;
• divide symbol string data obtained by converting the signal received from the device under test into most significant bit (MSB) string data and least significant bit (LSB) string data;
• compare each of the most significant bit string data and the least significant bit string data with predetermined error data to detect most significant bit errors and least significant bit errors of each one Codeword length and detect FEC Symbol Errors of each of the most significant bit string data and the least significant bit string data at one FEC Symbol interval;
• count the number of most significant bit errors and the number of least significant bit errors, and the number of FEC Symbol Errors as a comparison result;
• determine whether a forward error correction (FEC) operation of the device under test is possible or not based on the comparison result;
• and
• output a determination result of whether or not the FEC operation of the device under test is possible on a display screen with the number of counted FEC Symbol Errors for performing debugging.

An error counting method for operating an error rate measuring apparatus, the error counting method comprising:

• a step of transmitting a non return to zero (NRZ) signal of a known pattern as a test signal to a device under test;
• a step of receiving, from the device under test, a signal outputted from the device under test compliant with an input of the test signal;
• a step of setting one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test;
• a step of comparing bit string data obtained by converting the signal received from the device under test with predetermined error data to detect errors of each one Codeword length, and detecting FEC Symbol Errors of the bit string data at one FEC Symbol interval;
• and
• a step of counting the number of detected errors and the number of detected FEC Symbol Errors of each one Codeword length as the comparison result;
• a step of determining whether a forward error correction (FEC) operation of the device under test is possible or not based on a comparison result of the signal received from the device under test and the test signal;
• and
• a step of outputting a determination result of whether or not the FEC operation of the device under test is possible on a display screen with the number of counted FEC Symbol Errors for performing debugging.

An error counting method for operating an error rate measuring apparatus, the error counting method comprising:

• a step of transmitting a non return to zero (NRZ) signal of a known pattern as a test signal to a device under test and
• a step of receiving, from the device under test, a signal outputted from the device under test compliant with an input of the test signal;
• a step of setting one Codeword length and one FEC Symbol length of the FEC according to a communication standard of the device under test;
• a step of dividing symbol string data obtained by converting the signal received from the device under test into most significant bit (MSB) string data and least significant bit (LSB) string data;
• a step of comparing each of the divided most significant bit string data and least significant bit string data with predetermined error data to detect most significant bit errors and least significant bit errors of each one Codeword length, and detecting FEC Symbol Errors of each of the most significant bit string data and the least significant bit string data at one FEC Symbol interval;
• a step of counting the number of detected most significant bit errors and the number of detected least significant bit errors, and the number of detected FEC Symbol Errors, as the comparison result;
• and
• a step of determining whether a forward error correction (FEC) operation of the device under test is possible or not based on a comparison result of the signal received from the device under test and the test signal;
• and
• a step of outputting a determination result of whether or not the FEC operation of the device under test is possible on a display screen with the number of counted FEC Symbol Errors for performing debugging.